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GMII（Gigabit Media Independent Interface）

Ethernet MAC和PHY之间通讯的一种接口，最高支持1000Mbps。

常用标准

GMII信号连接如下图（图中PHY的TX和RX按按照MAC侧定义的，即MAC的TX应连接PHY的RX，MAC的RX连接PHY的TX）：

GMII各信号的定义见下表：

Table 11: GMII Signal Definitions
Signal Name	Direction (MAC)	Description
TXC	Input	Transmit Clock.This clock is sourced by the PHY and is 25 MHz for 100 Mbps mode and 2.5 MHz for 10 Mbps mode.The PHY samples TXD on the rising edge of TXC.This clock is completely unused while in Gigabit mode.
GTXCLK	Output	Gigabit Transmit Clock.This 125-MHz clock is used when in Gigabit mode,and completely unused during 10/100 mode.
TXEN	Output	Transmit Enable.Active high single indicating that the currentbyte on TXD is valid.
TXD[7:0]	Output	Transmit Data.Byte-wide transmit data.
TXER	Output	Transmit Error.Active high signal instructing the PHY to transmit an errored symbol.
RXC	Input	Receive Clock.This clock is sourced by the PHY and is 125 MHz for 1000 Mbps mode,25 MHz for 100 Mbps mode,and 2.5 MHz for 10 Mbps mode.The MAC samples RXD on the rising edge of RXC.
RXDV	Input	Receive Data Valid.Active high signal indicating that the current byte on RXD is valid.
RXD[7:0]	Input	Receive Data.Byte-wide receive data.
RXER	Input	Receive Error.Active high signal instructing the MAC that a packet error has been detected.
CRS	Input	Carrier Sense.Active high signal indicating activity on the media.
COL	Input	Collision.Active high signal indicating that a collision has occurred on the media.
MDC	Output	Management Data Clock.
MDIO	Bidirectional	Management Data.

电平转换：GMII电平一般有1.8V、2.5V和3.3V三种，MAC和PHY尽量配置成同样的电平，避免使用电平转换芯片。